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1.
J Nanosci Nanotechnol ; 21(8): 4315-4319, 2021 Aug 01.
Artigo em Inglês | MEDLINE | ID: mdl-33714320

RESUMO

We report the technique of trap distribution extraction according to the vertical position of the substrate in the p-MOSFET. This study was conducted on a single device. This technique is an experimental method. Ctrap was extracted based on the deep depletion C-V characteristics. In VFB, the trap level is neutral. When bias is applied, the energy band bends, resulting in modulation of the quasi-Fermi level. The area created by the bending of the energy band is equal to the area created by the Fermi level modulation. The trap level existing in this area becomes charged. Considering this, the spatial distribution of Trap was extracted. The trap extracted by the proposed method has a maximum value at the interface, rapidly decreases, and is distributed up to 8 nm in the vertical direction. The study of trap spatial distribution is expected to be applicable to the separation of trap interface state and bulk trap extraction later.

2.
J Nanosci Nanotechnol ; 20(7): 4287-4291, 2020 Jul 01.
Artigo em Inglês | MEDLINE | ID: mdl-31968459

RESUMO

We report an experimental characterization of the interface states (Dit(E)) by using the subthreshold drain current with optical charge pumping effect in In0.53Ga0.47As metal-oxide-semiconductor fieldeffect transistors (MOSFETs). The interface states are derived from the difference between the dark and photo states of the current-voltage characteristics. We used a sub-bandgap photon (i.e., with the photon energy lower than the bandgap energy, Eph < Eg) to optically excite trapped carriers over the bandgap in In0.53Ga0.47As MOSFETs. We combined a gate bias-dependent capacitance model to determine the channel length-independent oxide capacitance. Then, we estimated the channel length-independent interface states in In0.53Ga0.47As MOSFETs having different channel lengths (Lch = 5, 10, and 25 [µm]) for a fixed overlap length (Lov = 5 [µm]).

3.
RSC Adv ; 9(38): 22124-22128, 2019 Jul 11.
Artigo em Inglês | MEDLINE | ID: mdl-35518852

RESUMO

Carbon nanotubes (CNTs), a low-dimensional material currently popular in industry and academia, are promising candidates for addressing the limits of existing semiconductors. In particular, CNTs are attractive candidates for flexible electronic materials due to their excellent flexibility and potential applications. In this work, we demonstrate a flexible CNT Schottky diode based on highly purified, preseparated, solution-processed 99% semiconducting CNTs and an integrated circuit application using the CNT Schottky diodes. Notably, the fabricated flexible CNT diode can greatly modulate the properties of the contact formed between the semiconducting CNT and the anode electrode via the control gate bias, exhibiting a high rectification ratio of up to 2.5 × 105. In addition, we confirm that the electrical performance of the CNT Schottky diodes does not significantly change after a few thousand bending/releasing cycles of the flexible substrate. Finally, integrated circuit (IC) applications of logic circuits (OR and AND gates) and an analog circuit (a half-wave rectifier) were presented through the use of flexible CNT Schottky diode combinations. The correct output responses are successfully achieved from the circuit applications; hence, we expect that our findings will provide a promising basis for electronic circuit applications based on CNTs.

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